MAC: a novel systematically multilevel cache replacement policy for PCM memory

摘要

The rapid development of multi-core system and increase of data-intensiveapplication in recent years call for larger main memory. Traditional DRAMmemory can increase its capacity by reducing the feature size of storage cell.Now further scaling of DRAM faces great challenge, and the frequent refreshoperations of DRAM can bring a lot of energy consumption. As an emergingtechnology, Phase Change Memory (PCM) is promising to be used as main memory.It draws wide attention due to the advantages of low power consumption, highdensity and nonvolatility, while it incurs finite endurance and relatively longwrite latency. To handle the problem of write, optimizing the cache replacementpolicy to protect dirty cache block is an efficient way. In this paper, weconstruct a systematically multilevel structure, and based on it propose anovel cache replacement policy called MAC. MAC can effectively reduce writetraffic to PCM memory with low hardware overhead. We conduct simulationexperiments on GEM5 to evaluate the performances of MAC and other relatedworks. The results show that MAC performs best in reducing the amount of writes(averagely 25.12%) without increasing the program execution time.